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| M27C512 512 Kbit (64K x8) UV EPROM and OTP EPROM Features 5V 10% supply voltage in read operation Access time: 45 ns Low power "CMOS" consumption: - Active current 30 mA - Standby current 100 A Programming voltage: 12.75 V 0.25 V Programming time around 6 s. Electronic Signature - Manufacturer code: 20h - Device code: 3Dh Packages - ECOPACK(R) versions 28 28 1 FDIP28W (F) 1 PDIP28 (B) PLCC32 (C) Table 1. Package PDIP28 PLCC32 Device summary 45 ns 70 ns 90 ns M27C512-90B6 M27C512-70C6 M27C512-90C1 M27C51210C6 M27C51210F1 M27C51212C3 M27C51212F1 M27C51212F3 M27C512-15F1 M27C512-15F6 100 ns 120 ns 150 ns FDIP28W M27C512-45XF1 M27C512-70XF1 M27C512-90F1 M27C512-90F6 May 2007 Rev 3 1/22 www.st.com 1 Contents M27C512 Contents 1 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Device operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Two line output control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 System considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 PRESTO IIB programming algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Program Inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Program Verify . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 4 5 6 7 8 Erasure operation (applies for UV EPROM) . . . . . . . . . . . . . . . . . . . . . . 9 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 2/22 M27C512 Description 1 Description The M27C512 is a 512 Kbit EPROM offered in the two ranges UV (ultra violet erase) and OTP (one time programmable). It is ideally suited for applications where fast turn-around and pattern experimentation are important requirements and is organized as 65536 by 8 bits. The FDIP28W (window ceramic frit-seal package) has transparent lid which allows the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written to the device by following the programming procedure. For applications where the content is programmed only one time and erasure is not required, the M27C512 is offered in FDIP28W, PDIP28, and PLCC32 packages. In order to meet environmental requirements, ST offers the M27C512 in ECOPACK(R) packages. ECOPACK packages are Lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 1. Logic diagram VCC 16 A0-A15 8 Q0-Q7 E GVPP M27C512 VSS AI00761B Table 2. Signal names Name Description Address Inputs Data outputs Chip Enable Output Enable / Program Supply Supply Voltage Ground Not Connected Internally Don't Use Direction Inputs Outputs Input Input Supply Supply - A0-A15 Q0-Q7 E GVPP VCC VSS NC DU 3/22 Description Figure 2. DIP connections A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 Q0 Q1 Q2 VSS 1 28 2 27 3 26 4 25 5 24 6 23 7 22 M27C512 8 21 9 20 10 19 11 18 12 17 13 16 14 15 AI00762 M27C512 VCC A14 A13 A8 A9 A11 GVPP A10 E Q7 Q6 Q5 Q4 Q3 Figure 3. LCC connections A7 A12 A15 DU VCC A14 A13 1 32 A6 A5 A4 A3 A2 A1 A0 NC Q0 A8 A9 A11 NC GVPP A10 E Q7 Q6 9 M27C512 25 17 Q1 Q2 VSS DU Q3 Q4 Q5 AI00763 4/22 M27C512 Device operation 2 Device operation The modes of operations of the M27C512 are listed in the Operating Modes table. A single power supply is required in the read mode. All inputs are TTL levels except for GVPP and 12V on A9 for Electronic Signature. 2.1 Read mode The M27C512 has two control functions, both of which must be logically active in order to obtain data at the outputs. Chip Enable (E) is the power control and should be used for device selection. Output Enable (G) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that the addresses are stable, the address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is available at the output after a delay of tGLQV from the falling edge of G, assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV. 2.2 Standby mode The M27C512 has a standby mode which reduces the active current from 30mA to 100A The M27C512 is placed in the standby mode by applying a CMOS high signal to the E input. When in the standby mode, the outputs are in a high impedance state, independent of the GVPP input. Table 3. Operating modes(1) Mode Read Output Disable Program Program Inhibit Standby Electronic Signature 1. E VIL VIL VIL Pulse VIH VIH VIL GVPP VIL VIH VPP VPP X VIL A9 X X X X X VID Q7-Q0 Data Out Hi-Z Data In Hi-Z Hi-Z Codes X = VIH or VIL, VID = 12V 0.5V. Electronic Signature A0 VIL VIH Q7 0 0 Q6 0 0 Q5 1 1 Q4 0 1 Q3 0 1 Q2 0 1 Q1 0 0 Q0 0 1 Hex Data 20h 3Dh Table 4. Identifier Manufacturer's Code Device Code 5/22 Device operation M27C512 2.3 Two line output control Because EPROMs are usually used in larger memory arrays, the product features a 2 line control function which accommodates the use of multiple memory connection. The two line control function allows: The lowest possible memory power dissipation, Complete assurance that output bus contention will not occur. For the most efficient use of these two control lines, E should be decoded and used as the primary device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device. 2.4 System considerations The power switching characteristics of Advanced CMOS EPROMs require careful decoupling of the devices. The supply current, ICC, has three segments that are of interest to the system designer: the standby current level, the active current level, and transient current peaks that are produced by the falling and rising edges of E. The magnitude of the transient current peaks is dependent on the capacitive and inductive loading of the device at the output. The associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling capacitors. It is recommended that a 0.1F ceramic capacitor be used on every device between VCC and VSS. This should be a high frequency capacitor of low inherent inductance and should be placed as close to the device as possible. In addition, a 4.7F bulk electrolytic capacitor should be used between VCC and VSS for every eight devices. The bulk capacitor should be located near the power supply connection point.The purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces. 6/22 M27C512 Figure 4. Programming flowchart VCC = 6.25V, VPP = 12.75V SET MARGIN MODE Device operation n=0 E = 100s Pulse NO ++n = 25 YES NO VERIFY YES Last Addr NO ++ Addr FAIL YES RESET MARGIN MODE CHECK ALL BYTES 1st: VCC = 6V 2nd: VCC = 4.2V AI00738B 2.5 Programming When delivered (and after each erasure for UV EPROM), all bits of the M27C512 are in the '1' state. Data is introduced by selectively programming '0's into the desired bit locations. Although only '0's will be programmed, both '1's and '0's can be present in the data word. The only way to change a '0' to a '1' is by die exposure to ultraviolet light (UV EPROM). The M27C512 is in the programming mode when VPP input is at 12.75V and E is pulsed to VIL. The data to be programmed is applied to 8 bits in parallel to the data output pins. The levels required for the address and data inputs are TTL. VCC is specified to be 6.25V 0.25V. The M27C512 can use PRESTO IIB Programming Algorithm that drastically reduces the programming time (typically less than 6 seconds). Nevertheless to achieve compatibility with all programming equipments, PRESTO Programming Algorithm can be used as well. 2.6 PRESTO IIB programming algorithm PRESTO IIB Programming Algorithm allows the whole array to be programmed with a guaranteed margin, in a typical time of 6.5 seconds. This can be achieved with STMicroelectronics M27C512 due to several design innovations described in the M27C512 datasheet to improve programming efficiency and to provide adequate margin for reliability. Before starting the programming the internal MARGIN MODE circuit is set in order to guarantee that each cell is programmed with enough margin. Then a sequence of 100s program pulses are applied to each byte until a correct verify occurs. No overprogram pulses are applied since the verify in MARGIN MODE provides the necessary margin. 7/22 Device operation M27C512 2.7 Program Inhibit Programming of multiple M27C512s in parallel with different data is also easily accomplished. Except for E, all like inputs including GVPP of the parallel M27C512 may be common. A TTL low level pulse applied to a M27C512's E input, with VPP at 12.75V, will program that M27C512. A high level E input inhibits the other M27C512s from being programmed. 2.8 Program Verify A verify (read) should be performed on the programmed bits to determine that they were correctly programmed. The verify is accomplished with G at VIL. Data should be verified with tELQV after the falling edge of E. 2.9 Electronic Signature The Electronic Signature (ES) mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and type. This mode is intended for use by programming equipment to automatically match the device to be programmed with its corresponding programming algorithm. The ES mode is functional in the 25C 5C ambient temperature range that is required when programming the M27C512. To activate the ES mode, the programming equipment must force 11.5V to 12.5V on address line A9 of the M27C512. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. All other address lines must be held at VIL during Electronic Signature mode. Byte 0 (A0 = VIL) represents the manufacturer code and byte 1 (A0 = VIH) the device identifier code. For the STMicroelectronics M27C512, these two identifier bytes are given in 8/22 M27C512 Erasure operation (applies for UV EPROM) 3 Erasure operation (applies for UV EPROM) The erasure characteristics of the M27C512 is such that erasure begins when the cells are exposed to light with wavelengths shorter than approximately 4000 A. It should be noted that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000 A range. Research shows that constant exposure to room level fluorescent lighting could erase a typical M27C512 in about 3 years, while it would take approximately 1 week to cause erasure when exposed to direct sunlight. If the M27C512 is to be exposed to these types of lighting conditions for extended periods of time, it is suggested that opaque labels be put over the M27C512 window to prevent unintentional erasure. The recommended erasure procedure for the M27C512 is exposure to short wave ultraviolet light which has wavelength 2537 A. The integrated dose (i.e. UV intensity x exposure time) for erasure should be a minimum of 15 W-sec/cm2. The erasure time with this dosage is approximately 15 to 20 minutes using an ultraviolet lamp with 12000 W/cm2 power rating. The M27C512 should be placed within 2.5 cm (1 inch) of the lamp tubes during the erasure. Some lamps have a filter on their tubes which should be removed before erasure. 9/22 Maximum rating M27C512 4 Maximum rating Stressing the device outside the ratings listed in Symbol TA TBIAS TSTG TLEAD VIO (2) Absolute maximum ratings Parameter Ambient Operating Temperature(1) Value -40 to 125 -50 to 125 -65 to 150 (note 1) -2 to 7 -2 to 7 -2 to 13.5 -2 to 14 Unit C C C C V V V V Temperature Under Bias Storage Temperature Lead Temperature during Soldering Input or Output Voltage (except A9) Supply Voltage A9 Voltage Program Supply Voltage VCC VA9(2) VPP 1. Depends on range. 2. Minimum DC voltage on Input or Output is -0.5V with possible undershoot to -2.0V for a period less than 20ns. Maximum DC voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns. 10/22 M27C512 DC and AC parameters 5 DC and AC parameters This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC Characteristic tables that follow are derived from tests performed under the Measurement Conditions summarized in the relevant tables. Designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parameters. Table 6. AC measurement conditions High Speed Input Rise and Fall Times Input Pulse Voltages Input and Output Timing Ref. Voltages 10ns 0 to 3V 1.5V Standard 20ns 0.4V to 2.4V 0.8V and 2V Figure 5. Testing input/output waveform High Speed 3V 1.5V 0V Standard 2.4V 2.0V 0.8V AI01822 0.4V Figure 6. AC Testing Load Circuit 1.3V 1N914 3.3k DEVICE UNDER TEST CL OUT CL = 30pF for High Speed CL = 100pF for Standard CL includes JIG capacitance AI01823B 11/22 DC and AC parameters Table 7. Symbol CIN COUT M27C512 Capacitance Parameter Input Capacitance Output Capacitance Test Condition(1)(2) VIN = 0V VOUT = 0V Min Max 6 12 Unit pF pF 1. TA = 25C, f = 1MHz 2. Sampled only, not 100% tested. Table 8. Symbol ILI ILO ICC ICC1 ICC2 IPP VIL VIH(2) VOL VOH Read mode DC characteristics Parameter Input Leakage Current Output Leakage Current Supply Current Supply Current (Standby) TTL Supply Current (Standby) CMOS Program Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage TTL Output High Voltage CMOS IOL = 2.1mA IOH = -1mA IOH = -100A 3.6 VCC - 0.7V Test Condition(1) 0V VIN VCC 0V VOUT VCC E = VIL, G = VIL, IOUT = 0mA, f = 5MHz E = VIH E > VCC - 0.2V VPP = VCC -0.3 2 Min Max 10 10 30 1 100 10 0.8 VCC + 1 0.4 Unit A A mA mA A A V V V V V 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Maximum DC voltage on Output is VCC +0.5V. 12/22 M27C512 Table 9. Read mode AC characteristics DC and AC parameters M27C512 Symbol Alt Parameter Test Condition(1) -45(2) Min tAVQV tELQV tGLQV tEHQZ(3) tGHQZ(3) tAXQX tACC tCE tOE tDF tDF tOH Address Valid to Output Valid Chip Enable Low to Output Valid Output Enable Low to Output Valid Chip Enable High to Output Hi-Z Output Enable High to Output Hi-Z Address Transition to Output Transition E = VIL, G = VIL G = VIL E = VIL G = VIL E = VIL E = VIL, G = VIL 0 0 0 Max 45 45 25 25 25 0 0 0 Min -70 Max 70 70 35 30 30 ns ns ns ns ns ns Unit 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Speed obtained with High Speed AC measurement conditions. 3. Sampled only, not 100% tested. Table 10. Read mode AC characteristics M27C512 Symbol Alt Parameter Test Condition(1) -90 -10 -12 -15 Unit Min Max Min Max Min Max Min Max tAVQV tELQV tGLQV tEHQZ (2) tGHQZ(2) tACC tCE tOE tDF Address Valid to Output Valid Chip Enable Low to Output Valid Output Enable Low to Output Valid Chip Enable High to Output Hi-Z Output Enable High to Output HiZ Address Transition to Output Transition E = VIL, G = VIL G = VIL E = VIL G = VIL 0 90 90 40 30 0 100 100 40 30 0 120 120 50 40 0 150 150 60 50 ns ns ns ns tDF E = VIL 0 30 0 30 0 40 0 50 ns tAXQX tOH E = VIL, G = VIL 0 0 0 0 ns 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Sampled only, not 100% tested. 13/22 DC and AC parameters Figure 7. Read mode AC waveforms M27C512 A0-A15 VALID tAVQV tAXQX VALID E tGLQV G tELQV Q0-Q7 tGHQZ Hi-Z tEHQZ AI00735B Table 11. Symbol ILI ICC IPP VIL VIH VOL VOH VID Programming mode DC characteristics Parameter Input Leakage Current Supply Current Program Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage TTL A9 Voltage IOL = 2.1mA IOH = -1mA 3.6 11.5 12.5 E = VIL -0.3 2 Test Condition(1)(2) VIL VIN VIH Min Max 10 50 50 0.8 VCC + 0.5 0.4 Unit A mA mA V V V V V 1. TA = 25 C; VCC = 6.25V 0.25V; VPP = 12.75V 0.25V 2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. Table 12. Symbol tA9HVPH tVPHEL tA10HEH tA10LEH tEXA10X tEXVPX tVPXA9X Margin Mode AC Characteristics Alt tAS9 tVPS tAS10 tAS10 tAH10 tVPH tAH9 Parameter VA9 High to VPP High VPP High to Chip Enable Low VA10 High to Chip Enable High (Set) VA10 Low to Chip Enable High (Reset) Chip Enable Transition to VA10 Transition Chip Enable Transition to VPP Transition VPP Transition to VA9 Transition Test Condition(1)(2) Min 2 2 1 1 1 2 2 Max Unit s s s s s s s 1. TA = 25 C; VCC = 6.25V 0.25V; VPP = 12.75V 0.25V 2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 14/22 M27C512 Figure 8. Margin mode AC waveforms VCC DC and AC parameters A8 A9 tA9HVPH GVPP tVPHEL E tA10HEH A10 Set tEXA10X tEXVPX tVPXA9X A10 Reset tA10LEH AI00736B 1. A8 High level = 5V; A9 High level = 12V. 15/22 DC and AC parameters Table 13. Symbol tAVEL tQVEL tVCHEL tVPHEL tVPLVPH tELEH tEHQX tEHVPX tVPLEL tELQV tEHQZ(3) tEHAX M27C512 Programming mode AC characteristics Alt tAS tDS tVCS tOES tPRT tPW tDH tOEH tVR tDV tDFP tAH Parameter Address Valid to Chip Enable Low Input Valid to Chip Enable Low VCC High to Chip Enable Low VPP High to Chip Enable Low VPP Rise Time Chip Enable Program Pulse Width (Initial) Chip Enable High to Input Transition Chip Enable High to VPP Transition VPP Low to Chip Enable Low Chip Enable Low to Output Valid Chip Enable High to Output Hi-Z Chip Enable High to Address Transition 0 0 Test Condition(1)(2) Min 2 2 2 2 50 95 2 2 2 1 130 105 Max Unit s s s s ns s s s s s ns ns 1. TA = 25 C; VCC = 6.25V 0.25V; VPP = 12.75V 0.25V 2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 3. Sampled only, not 100% tested. Figure 9. A0-A15 Programming and Verify modes AC waveforms VALID tAVEL tEHAX DATA IN tQVEL tEHQX tELQV tVCHEL tEHVPX DATA OUT tEHQZ Q0-Q7 VCC GVPP tVPHEL E tELEH PROGRAM VERIFY AI00737 tVPLEL 16/22 M27C512 Package mechanical 6 Package mechanical Figure 10. FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, Package Outline A2 A3 A1 B1 B D2 D S N 1 FDIPW-a A L eA eB C e E1 E 1. Drawing is not to scale. Table 14. Symbol FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, Package Mechanical Data millimeters Typ Min Max 5.72 0.51 3.91 3.89 0.41 1.45 - 0.23 36.50 33.02 15.24 - - 13.06 2.54 14.99 - - 16.18 3.18 1.52 7.11 - 4 28 1.40 4.57 4.50 0.56 - 0.30 37.34 - - 13.36 - - 18.03 4.10 2.49 - 11 0.280 0.100 0.590 1.300 0.600 0.057 0.020 0.154 0.153 0.016 - 0.009 1.437 - - 0.514 - - 0.637 0.125 0.060 - 4 28 Typ inches Min Max 0.225 0.055 0.180 0.177 0.022 - 0.012 1.470 - - 0.526 - - 0.710 0.161 0.098 - 11 A A1 A2 A3 B B1 C D D2 E E1 e eA eB L S N 17/22 Package mechanical Figure 11. PDIP28 - 28 pin Plastic DIP, 600 mils width, Package Outline A2 A1 B1 B D2 D S N M27C512 A L eA eB C e1 E1 1 E PDIP 1. Drawing is not to scale. Table 15. Symbol PDIP28 - 28 pin Plastic DIP, 600 mils width, Package Mechanical Data millimeters Typ Min Max Typ 0.1750 0.0248 3.050 4.570 0.1500 0.0177 0.0500 0.230 36.830 33.020 15.240 13.720 2.540 15.000 12.700 - 14.800 15.200 3.300 1.78 0 28 2.08 10 14.480 - 15.200 16.680 0.1299 0.070 0 28 0.082 10 36.580 - 0.310 37.080 - 1.4500 1.3000 0.6000 0.5402 0.1000 0.5906 0.5000 - 0.5827 0.5984 0.5701 - 0.5984 0.6567 0.0091 1.4402 - 0.0122 1.4598 - 0.1201 0.1799 inches Min Max A A1 A2 B B1 C D D2 E E1 e1 eA eB L S N 4.445 0.630 3.810 0.450 1.270 18/22 M27C512 Figure 12. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Outline D D1 1N Package mechanical A1 A2 B1 E2 E3 E1 E e F 0.51 (.020) 1.14 (.045) D3 R CP A E2 B D2 D2 PLCC-A 1. Drawing is not to scale. Table 16. Symbol PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Mechanical Data millimeters Typ Min 3.18 1.53 0.38 0.33 0.66 Max 3.56 2.41 - 0.53 0.81 0.10 12.32 11.35 4.78 7.62 - 14.86 13.89 6.05 10.16 1.27 - - 0.00 0.89 - 32 12.57 11.51 5.66 - 15.11 14.05 6.93 - - 0.13 - 0.035 0.400 0.050 0.300 0.485 0.447 0.188 - 0.585 0.547 0.238 - - 0.000 - 32 Typ inches Min 0.125 0.060 0.015 0.013 0.026 Max 0.140 0.095 - 0.021 0.032 0.004 0.495 0.453 0.223 - 0.595 0.553 0.273 - - 0.005 - A A1 A2 B B1 CP D D1 D2 D3 E E1 E2 E3 e F R N 19/22 Part numbering M27C512 7 Part numbering Table 17. Example: Device Type M27 Supply Voltage C = 5V Device Function 512 = 512 Kbit (64Kb x8) Speed -45 = 45 ns(1) -70 = 70 ns -90 = 90 ns -10 = 100 ns -12 = 120 ns -15 = 150 ns VCC Tolerance blank = 10% X = 5% Package F = FDIP28W B = PDIP28 C = PLCC32 Temperature Range 1 = 0 to 70 C 3 = -40 to 125 C 6 = -40 to 85 C Ordering Information Scheme M27C512 -70 XC1 1. High Speed, see AC Characteristics section for further information. For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact your nearest ST Sales Office. 20/22 M27C512 Revision history 8 Revision history Table 18. Date November 1998 25-Sep-2000 02-Apr-2001 29-Aug-2002 08-Nov-2004 Document revision history Revision 1.0 1.1 1.2 1.3 2.0 First Issue AN620 Reference removed FDIP28W mechanical dimensions changed ( 18-May-2007 3 21/22 M27C512 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. 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